1. Field
The present disclosure relates generally to multi supply cell arrays for low power designs.
2. Background
A standard cell is an integrated circuit that may be implemented with digital logic. A semiconductor die typically contains many standard cells. For example, the standard cells may include buffer cells that operate using a first voltage source that is different from a second voltage source used by other nearby standard cells. Improvements to architectures utilizing such standard cells that operate using the first voltage source are needed to reduce layout area consumption and/or routing congestion on the semiconductor die.